Instruction scheduling is a compiler optimization used to improve instruction-level parallelism, which
is an important step for improving the performance of object code produced by a compiler. Put more
simply, it tries to avoid pipeline stalls by rearranging the order of instructions without changing the
meaning of the code. Nevertheless, even for simple processors, solving the problem is NP-complete.
However, modern processors have multiple pipelined functional units and can issue more than one
